Memory map
From Sp305x wiki
The SPMP3050 memory map is very sparse and simple:
AHB Memory layout
0x00000000 -> 0x03FFFFFF BootROM or Main SDRAM. The latter would be mirored across this space.
0x10000000 -> 0x1000FFFF MMIO region.
0x24000000 -> 0x27FFFFFF Main SDRAM area, mirrored across depending on size.
0x2C000000 -> 0x2C007FFF BootROM
Everything else is unimplemented and reads as zeroes. Boring, innit?
TCMs
There's a 32kB iTCM and a 64kB dTCM.
The dTCM is mapped by the bootloader at 0x2E000000, and consists of 34kB of on-chip SRAM (0x0000 - 0x87ff) and a ROM section (0xA000 - 0xffff) containing tables for the iTCM ROM. The gap in between is bus noise. The iTCM is mapped by the firmware at 0x2D000000, and is an on-chip ROM. It contains a subroutine library of common algorithms (decompression, hashing, crypto, etc). This the Sunplus version of "hardware acceleration". The iTCM subroutines use dTCM for data tables from 0xA000 to 0xFFFF (and expect it to be mapped at 0x2E000000).
IO registers
Again, due to the lack of the datasheet, this is a very short section. Because we've now started to port Prex, this section won't be updated much. You can find the most recent header file in the libspmp3050 SVN repo, to be found at http://code.google.com/p/libspmp3050
0x1000B000 GPIO base address
0x1000B060 GPIO bank A base address
0x1000B064 GPIO bank A direction register (or output, unknown)
0x1000B068 GPIO bank A output register (or direction, unknown)
0x1000B06C GPIO bank A input register
0x1000B0E0 GPIO bank B base address
0x1000B320 GPIO general disable register (?) need to write all zeroes to this.
Bit 1 of bank A is the unit-turn-on GPIO, write 0x02 to the direction and output register to turn the unit on.
UARTs
The registers below need to have n << 5 added to them to point to the UART you want (So, for UART1, add 0x20 to each offset).
0x10001800 Base address for the UART0.
0x10001802 FIFO, both Rx FIFO and Tx FIFO.
0x1000180A UART0 status register. Bit 1 is the Tx_BUSY bit, Bit 2 is the Rx_VALID bit.
0x10001880 General UART enable register. Bit 0 is UART0, Bit 1 is UART1.
Display
Display registers are located at 0x1000A000.
The backlight is turned on by setting bit 3 in 0x10001108 and 0x10001100
NAND
NAND registers are located at 0x10004000
